Polyphony :Python Based HLS

Polyphony is a Python-based high-level synthesis compiler.

This compiler maps program codes written in Python (version 3.6 or later) to Verilog HDL codes that is synthesizable and executable on FPGA chips, also ASIC.

Python is simple, easy-to-learn and high readability. So the Python-based HLS compiler brings a higher level of abstraction to design methodologies, allowing designers to focus on developing your own algorithms!!

Open Source

Polyphony is an open source, pure Python package.You can install with pip. Please visit our project on Github.

$ pip3 install polyphony

Design Flow

  1. Write codes to be implemented in hardware in Python.
  2. Write test codes in Python.
  3. Run the codes on a Python interpreter for verification.
  4. Compile the codes, including the test codes, with Polyphony.
  5. Simulate the Verilog codes generated by Polyphony.
  6. Embed the Verilog codes into the hardware design.
  7. Synthesize and Implement the design.
  8. Execute the binary code on the target board.
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